Radiation-Insensitive Inverse Majority Gates

To help satisfy a need for high-density logic circuits insensitive to radiation, it has been proposed to realize inverse majority gates as microscopic vacuum electronic devices. In comparison with solid-state electronic devices ordinarily used in logic circuits, vacuum electronic devices are inherently much less adversely affected by radiation and extreme temperatures. The proposed development would involve state-of-the-art micromachining and recent advances in the fabrication of carbon-nanotube-based field emitters. A representative three-input inverse majority gate would be a monolithic, integrated structure that would include three gate electrodes, six bundles of carbon nanotubes (serving as electron emitters) at suitable positions between the gate electrodes, and an overhanging anode. The bundles of carbon nanotubes would be grown on degenerately doped silicon substrates that would be parts of the monolithic structure. The gate electrodes would be fabricated as parts of the monolithic structure by means of a double-silicon-on-insulator process developed at NASA's Jet Propulsion Laboratory. The tops of the bundles of carbon nanotubes would lie below the plane of the tops of the gate electrodes. The particular choice of shapes, dimensions, and relative positions of the electrodes and bundles of carbon nanotubes would provide for both field emission of electrons from the bundles of carbon nanotubes and control of the electron current to obtain the inverse majority function, which is described in the paper

Millimeter-wave wireless power transfer technology for space applications

Technologies enabling the development of compact systems for wireless transfer of power through radio frequency waves (RF) continue to be important for future space based systems. For example, for lunar surface operation, wireless power transfer technology enables rapid on-demand transmission of power to loads (robotic systems, habitats, and others) and eliminates the need for establishing a traditional power grid. A typical wireless power receiver consists of an array of rectenna elements. Each rectenna element consists of an antenna together with a high speed diode and a storage capacitor configured in a highly tuned narrowband circuit for this purpose. The conversion of the microwave energy into DC in this fashion is almost instantaneous. Using a high power rectenna array in concert with a fast charging high performance battery can enable charging of the battery at very short time with a large power burst and discharge of it at a lower rate for an extended operation time for remote electronic assets

Thermionic Power Cell To Harness Heat Energies for Geothermal Applications

A unit thermionic power cell (TPC) concept has been developed that converts natural heat found in high-temperature environments (460 to 700 C) into electrical power for in situ instruments and electronics. Thermionic emission of electrons occurs when an emitter filament is heated to gwhite hot h temperatures (>1,000 C) allowing electrons to overcome the potential barrier and emit into the vacuum. These electrons are then collected by an anode, and transported to the external circuit for energy storage

Four-Quadrant Analog Multipliers Using G4-FETs

Theoretical analysis and some experiments have shown that the silicon-on-insulator (SOI) 4-gate transistors known as G4-FETs can be used as building blocks of four-quadrant analog voltage multiplier circuits. Whereas a typical prior analog voltage multiplier contains between six and 10 transistors, it is possible to construct a superior voltage multiplier using only four G4-FETs. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET). It can be regarded as a single transistor having four gates, which are parts of a structure that affords high functionality by enabling the utilization of independently biased multiple inputs. The structure of a G4-FET of the type of interest here (see Figure 1) is that of a partially-depleted SOI MOSFET with two independent body contacts, one on each side of the channel. The drain current comprises of majority charge carriers flowing from one body contact to the other that is, what would otherwise be the side body contacts of the SOI MOSFET are used here as the end contacts [the drain (D) and the source (S)] of the G4-FET. What would otherwise be the source and drain of the SOI MOSFET serve, in the G4-FET, as two junction-based extra gates (JG1 and JG2), which are used to squeeze the channel via reverse-biased junctions as in a JFET. The G4-FET also includes a polysilicon top gate (G1), which plays the same role as does the gate in an accumulation-mode MOSFET. The substrate emulates a fourth MOS gate (G2). By making proper choices of G4-FET device parameters in conjunction with bias voltages and currents, one can design a circuit in which two input gate voltages (Vin1,Vin2) control the conduction characteristics of G4-FETs such that the output voltage (Vout) closely approximates a value proportional to the product of the input voltages. Figure 2 depicts two such analog multiplier circuits. In each circuit, there is the following: The input and output voltages are differential, The multiplier core consists of four G4- FETs (M1 through M4) biased by a constant current sink (Ibias), and The G4-FETs in two pairs are loaded by two identical resistors (RL), which convert a differential output current to a differential output voltage. The difference between the two circuits stems from their input and bias configurations. In each case, provided that the input voltages remain within their design ranges as determined by considerations of bias, saturation, and cutoff, then the output voltage is nominally given by Vout = kVin1Vin2, where k is a constant gain factor that depends on the design parameters and is different for the two circuits. In experimental versions of these circuits constructed using discrete G4- FETs and resistors, multiplication of voltages in all four quadrants (that is, in all four combinations of input polarities) was demonstrated, and deviations of the output voltages from linear dependence on the input voltages were found to amount to no more than a few percent. It is anticipated that in fully integrated versions of these circuits, the deviations from linearity will be made considerably smaller through better matching of devices

Four-gate transistor analog multiplier circuit

A differential output analog multiplier circuit utilizing four G.sup.4-FETs, each source connected to a current source. The four G.sup.4-FETs may be grouped into two pairs of two G.sup.4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G.sup.4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed

Future Missions to Titan: Scientific and Engineering Challenges

Saturn’s largest moon, Titan, has been an enigma at every stage of its exploration. For three decades after the hazy atmosphere was discovered from the ground in the 1940s, debate ensued over whether it was a thin layer of methane or a dense shield of methane and nitrogen. Voyager 1 settled the matter in favor of the latter in 1980, but the details of the thick atmosphere discovered raised even more intriguing questions about the nature of the hidden surface, and the sources of resupply of methane to the atmosphere. The simplest possibility, that an ocean of methane and its major photochemical product ethane might cover the globe, was cast in doubt by Earth-based radar studies and then eliminated by Hubble Space Telescope and adaptive optics imaging in the near-infrared from large ground-based telescopes in the 1990s. These data, however, did not reveal the complexity of the surface that Cassini-Huygens would uncover beginning in 2004. A hydrological cycle appears to exist in which methane (in concert with ethane in some processes) plays the role on Titan that water plays on Earth. Channels likely carved by liquid methane and/or ethane, lakes and seas of these materials—some rivaling or exceeding North America’s Great Lakes in size—vast equatorial dune fields of complex organics made high in the atmosphere and shaped by wind, and intriguing hints of geologic activity suggest a world with a balance of geologic and atmospheric processes that is the solar system’s best analogue to Earth. Deep underneath Titan’s dense atmosphere and active, diverse surface is an interior ocean discovered by Cassini and thought to be largely composed of liquid water. Cassini-Huygens has provided spectacular data and has enabled us to glimpse the mysterious surface of Titan. However the mission will leave us with many questions that require future missions to answer. These include determining the composition of the surface and the geographic distribution of various organic constituents. Key questions remain about the ages of surface features, specifically whether cryovolcanism and tectonism are actively ongoing or are relics of a more active past. Ammonia, circumstantially suggested to be present by a variety of different kinds of Cassini-Huygens data, has yet to be seen. Is methane out-gassing from the interior or ice crust today? Are the lakes fed primarily by rain or underground methane-ethane aquifers (more properly, “alkanofers”) and how often have heavy methane rains come to the equatorial region? We should investigate whether Titan’s surface supported vaster seas of methane in the past, and whether complex self-organizing chemical systems have come and gone in the water volcanism, or even exist in exotic form today in the high latitude lakes. The presence of a magnetic field has yet to be established. A large altitude range in the atmosphere, from 400–900 km in altitude, will remain poorly explored after Cassini. Much remains to be understood about seasonal changes of the atmosphere at all levels, and the long-term escape of constituents to space. Other than Earth, Titan is the only world in our solar system known to have standing liquids and an active “hydrologic cycle” with clouds, rains, lakes and streams. The dense atmosphere and liquid lakes on Titan’s surface can be explored with airborne platforms and landed probes, but the key aspect ensuring the success of future investigations is the conceptualization and design of instruments that are small enough to fit on the landed probes and airborne platforms, yet sophisticated enough to conduct the kinds of detailed chemical (including isotopic), physical, and structural analyses needed to investigate the history and cycling of the organic materials. In addition, they must be capable of operating at cryogenic temperatures while maintaining the integrity of the sample throughout the analytic process. Illuminating accurate chemistries also requires that the instruments and tools are not simultaneously biasing the measurements due to localized temperature increases. While the requirements for these techniques are well understood, their implementation in an extremely low temperature environment with limited mass, power and volume is acutely challenging. No such instrument systems exist today. Missions to Titan are severely limited in both mass and power because spacecraft have to travel over a billion miles to get there and require a large amount of fuel, not only to reach Titan, but to maintain the ability to maneuver when they arrive. Landed missions have additional limitations, in that they must be packaged in a sealed aeroshell for entry into Titan’s atmosphere. Increases in landed mass and volume translate to increased aeroshell mass and size, requiring even more fuel for delivery to Titan. Nevertheless, missions during which such systems and instruments could be employed range from Discovery and New Frontiers class in situ probes that might be launched in the next decade, to a full-up Flagship class mission anticipated to follow the Europa Jupiter System Mission. Capitalizing on recent breakthroughs in cryo-technologies and smart materials fabrication, we developed conceptual designs of sample acquisition systems and instruments capable of in situ operation under low temperature environments. The study included two workshops aimed at brainstorming and actively discussing a broad range of ideas and associated challenges with landing instruments on Titan, as well as more focused discussions during the intervening part of the study period. The workshops each lasted ~4 days (Monday-Thursday/Friday), included postdoctoral fellows and students in addition to the core team members, and generated active engagement from the Caltech and JPL team participants, as well as from the outside institutions. During the workshops, new instruments and sampling methodologies were identified to handle the challenges of characterizing everything from small molecules in Titan’s upper atmosphere to gross mixtures of high molecular weight complex organics in condensed phases, including atmospheric aerosols and “organic sand” in dunes, to highly dilute components in ices and lakes. To enable these advances in cryogenic instrumentation breakthroughs in a wide range of disciplines, including electronics, chemical and mechanical engineering, and materials science were identified

Electro-Mechanical Systems for Extreme Space Environments

Exploration beyond low earth orbit presents challenges for hardware that must operate in extreme environments. The current state of the art is to isolate and provide heating for sensitive hardware in order to survive. However, this protection results in penalties of weight and power for the spacecraft. This is particularly true for electro-mechanical based technology such as electronics, actuators and sensors. Especially when considering distributed electronics, many electro-mechanical systems need to be located in appendage type locations, making it much harder to protect from the extreme environments. The purpose of this paper to describe the advances made in the area of developing electro-mechanical technology to survive these environments with minimal protection. The Jet Propulsion Lab (JPL), the Glenn Research Center (GRC), the Langley Research Center (LaRC), and Aeroflex, Inc. over the last few years have worked to develop and test electro-mechanical hardware that will meet the stringent environmental demands of the moon, and which can also be leveraged for other challenging space exploration missions. Prototype actuators and electronics have been built and tested. Brushless DC actuators designed by Aeroflex, Inc have been tested with interface temperatures as low as 14 degrees Kelvin. Testing of the Aeroflex design has shown that a brushless DC motor with a single stage planetary gearbox can operate in low temperature environments for at least 120 million cycles (measured at motor) if long life is considered as part of the design. A motor control distributed electronics concept developed by JPL was built and operated at temperatures as low as -160 C, with many components still operational down to -245 C. Testing identified the components not capable of meeting the low temperature goal of -230 C. This distributed controller is universal in design with the ability to control different types of motors and read many different types of sensors. The controller form factor was designed to surround or be at the actuator. Communication with the slave controllers is accomplished by a bus, thus limiting the number of wires that must be routed to the extremity locations. Efforts have also been made to increase the power capability of these electronics for the ability to power and control actuators up to 2.5KW and still meet the environmental challenges. For commutation and control of the actuator, a resolver was integrated and tested with the actuator. Testing of this resolver demonstrated temperature limitations. Subsequent failure analysis isolated the low temperature failure mechanism and a design solution was negotiated with the manufacturer. Several years of work have resulted in specialized electro-mechanical hardware to meet extreme space exploration environments, a test history that verifies and finds limitations of the designs and a growing knowledge base that can be leveraged by future space exploration missions

Low-Cutoff, High-Pass Digital Filtering of Neural Signals

The figure depicts the major functional blocks of a system, now undergoing development, for conditioning neural signals acquired by electrodes implanted in a brain. The overall functions to be performed by this system can be summarized as preamplification, multiplexing, digitization, and high-pass filtering. Other systems under development for recording neural signals typically contain resistor-capacitor analog low-pass filters characterized by cutoff frequencies in the vicinity of 100 Hz. In the application for which this system is being developed, there is a requirement for a cutoff frequency of 5 Hz. Because the resistors needed to obtain such a low cutoff frequency would be impractically large, it was decided to perform low-pass filtering by use of digital rather than analog circuitry. In addition, it was decided to timemultiplex the digitized signals from the multiple input channels into a single stream of data in a single output channel. The signal in each input channel is first processed by a preamplifier having a voltage gain of approximately 50. Embedded in each preamplifier is a low-pass anti-aliasing filter having a cutoff frequency of approximately 10 kHz. The anti-aliasing filters make it possible to couple the outputs of the preamplifiers to the input ports of a multiplexer. The output of the multiplexer is a single stream of time-multiplexed samples of analog signals. This stream is processed by a main differential amplifier, the output of which is sent to an analog-to-digital converter (ADC). The output of the ADC is sent to a digital signal processor (DSP)

Development and Testing of Mechanism Technology for Space Exploration in Extreme Environments

The NASA Jet Propulsion Lab (JPL), Glenn Research Center (GRC), Langley Research Center (LaRC), and Aeroflex, Inc. have partnered to develop and test actuator hardware that will survive the stringent environment of the moon, and which can also be leveraged for other challenging space exploration missions. Prototype actuators have been built and tested in a unique low temperature test bed with motor interface temperatures as low as 14 degrees Kelvin. Several years of work have resulted in specialized electro-mechanical hardware to survive extreme space exploration environments, a test program that verifies and finds limitations of the designs at extreme temperatures, and a growing knowledge base that can be leveraged by future space exploration missions

G(sup 4)FET Implementations of Some Logic Circuits

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FE